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Counter Circuit Description
The circuit shown requires twelve integrated circuits
in addition to other discrete components. Integrated circuit choice was based
on economy--- that is, using parts that were on hand. There are many alternate
ICs that may be substituted for the NAND gates, counters and multivibrator.
The 4060 counter /oscillator and 4046 Phase Locked Loop IC are probably good
choices in any event, but there are other possibilities there also. If power
is to be obtained from batteries, substitution of equivalent CMOS logic ICs
in place of TTL types will reduce dc current requirements.
(There is another circuit shown in a separate segment that is a simpler LISTEN ONLY version. It eliminates the frequency counter and uses a timer to cycle the polarizing current to the sensor coils on and off.)
Timing for polarizing the sensors and measuring frequency is derived from a watch crystal. These are the tiny cylindrical units found in some digital wrist watches. They sell for about two for a dollar at Active Electronics or a dollar each at Radio Shack.
The oscillator circuit is pretty much per CD4060/MC14060 application note. The oscillator portion produces an output frequency of 32.768 kHz that is applied to a fourteen stage counter. The final output of the last stage is 2 Hz or a pulse repetition rate of 0.5 seconds. This drives a 4 stage binary counter whose last stage provides a four second high / four second low logic level. For simplicity, the full count cycle of the 4 stage binary counter is used. If the intent is to use the magnetometer in a portable search mode, it would probably be useful to shorten the four second (listen) non polarizing interval to a half second. This will require the addition of at least one four input NAND gate to decode the counter state (10 count ) and reset the counter.
Polarizing current should be applied to the sensing coils for several seconds in order to maximize the amplitude of the precession signal. Three seconds appears to be sufficient. After removal of the polarizing current the the relay connects the coil(s) to the input of an audio amplifier. The output of the audio amplifier is a ringing tone at the precession frequency, whose amplitude rapidly decreases into the background noise level. In order to obtain an accurate measurement of the frequency, the counter should begin sampling immediately after the removal of polarizing current. Also counting should only be done when the signal amplitude is well above the noise level.
Measuring the audio amplifier output directly would require a 1 second counting interval to resolve to 1 Hz at the expected relaxation frequency, and 10 seconds to resolve frequency to 0.1 Hz. Certainly, in the last case, the signal would have long decayed below amplifier noise or local power line harmonics. And, in a backyard environment, after one second, the signal is competing with ac power line harmonics.
A phase locked loop is used to permit measuring the precession frequency to 1 an 0.1 Hz resolutions using counting intervals much less than one second. One input to the phase detector is the output of the audio amplifier. The other input to the phase detector is derived from the voltage controlled oscillator (VCO) whose frequency is divided down by two intervening digital dividers; a divide by 10 and a divide by 8 in series. When in lock the VCO frequency is then equal to the audio amplifier output frequency multiplied by a factor equal to the total division ( 8 x 10 =80). Measuring the VCO output frequency at the output of the divide by ten counter using a counting interval of one-eighth second allows resolution to 1 HZ. Measuring the VCO frequency directly ( ahead of the divide by ten counter ) allows resolution to 0.1 Hz. In this case, the most significant digit (thousands) overflows the fourth stage of the counter leaving the display of hundreds, tens , ones and tenths Hz.
For simplicity and economy, individual light emitting diodes are used to display the state of the decade counter. The schematic shows four LEDs at the most significant digit, two or three should be sufficient since this stage will normally always read the BCD equivalent of a 2 ( two thousand or two hundred depending upon the resolution selected). Under stable conditions, there is only a variation in the least significant digit when using one Hertz resolution or the last two significant digits when resolving to one-tenth Hz. If the intended use is for portable searching, I suspect that it would be desirable to use a decimal display so that changes in the reading may be easily seen. (Although just listening to the audio output may be sufficient to detect magnetic anomalies. ) There are many choices to implement this - - - -composite LCD display, seven segment LCD, etc. These will require the addition of the appropriate BCD to segment decoder/ drivers or the use of the expensive integrated counter/display ICs.
For economy, minimizing interconnecting wiring and component count , monostable
multivibrators (one shots) are used to set the decade frequency counter gating
and timing intervals. This is probably easier than decoding the states of
the CD4060 and 74197 counters (U1 and U2) that derive the time base from
the 32.768 crystal. Straight decoding would require several multiple input
NAND gates as well as inverters ( since the counters do not provide complementary
logic outputs- - - - Q and inverted
Q.)
The periods of the multivibrators must be set with some degree of accuracy since the tolerance on the nominal values of the timing components is insufficient to guarantee correct time delays. The existing accurate time base waveforms and the decade counter are used to set the time delays accurately. The timing resistor values, R3 and R4, are varied as needed to provide the correct time delays.
Time Delay Adjustment
The fourth binary stage of the CD4060 oscillator/counter output (Q4) is available at pin 7. The oscillator frequency has been divided by a factor of 16 at this point, resulting in a frequency of 2048 Hz.
U3A Delay
Make the following temporary connections:
1. Open connection between points A1 and A2. Connect A2 to the 2048 test signal at U1 pin 7.
2. Open the connection between points TC1 and TC2. This places an enabling signal to the decade counter input gate that is equal to the time delay of multivibrator U3A.
Adjust the value of R12 at pin 11 of U10 to some value around 8000 ohms or so. This should adjust the free run frequency of the CD4046 VCO to value that will allow it to phase lock to the test signal. At lock the VCO frequency should be 80 times that of the test signal or 163840 Hz. Set the resolution switch (S1) to 1 Hz. This connects the divided (by 10) VCO frequency of 16384 to the decade counter input gate.
Use a nominal value of 56 kohms or 62 kohms as the timing resistor for R3.
The counter display should produce a new reading every eight seconds. The desired counter display should be equivalent to 0.2 seconds which will be displayed as 0.2 X 16384 or 3277. Select a value of resistor to give time delay of 190 to 210 milliseconds or a counter reading between 3112 and 3440.
U3B Delay:
Leave previous test connections as they were. Make the following additional temporary test connections:
1. Open connection between points D1 and D2.
2. Open connection between points B1 and B2. Connect a short insulated wire to B1 such that you can manually touch it to ground to reset the decade counter zero.
3. Temporary connection from point E1 to D1.
Manually reset the counter by manually grounding B1. Observe counter reading as before and reset counter manually as needed. Use an initial value of 27 kohms for R4.
Adjust the value of R4 to provide a delay time between 90 and 100 milliseconds, equivalent to counter readings between 1475 and 1638.
Restore all connections to normal per schematic.
VCO Frequency:
Temporarily connect point A1/A2 to ground. Adjust value of R12 to produce a counter reading of 2230 to 2250. Remove temporary ground.